Field of the Invention
The present invention relates to a method for providing a timestamp in a real-time system, whereby the real-time system comprises an FPGA and a CPU, which cooperate with one another, and at least one register, which contains a system time, is implemented in the FPGA. Further, the invention relates to a data processing unit as a real-time system having an FPGA and a CPU, which cooperate with one another, whereby at least one register, which contains a system time, is implemented in the FPGA and the real-time system is designed to carry out the above method. The invention also relates to a computer program product with computer-implemented instructions, said product which after loading and execution in a suitable data processing unit performs the steps of the above method, and a digital storage medium with electronically readable control signals, which can work together with a programmable computer system so that the above method is carried out in the computer system.
Description of the Background Art
In different fields of application for data processing units, the use of an absolute time base is necessary to be able to perform a synchronization of various processes. In distributed systems, different methods for synchronization are known, for example, the Berkeley algorithm, the Cristian algorithm, or the Network Time Protocol (NTP). These algorithms consider only the distribution of the time among different data processing units.
In data processing units, particularly in real-time systems, more and more applications are used today that also require a reliable time base internally. For example, it may be necessary during the logging of events to determine absolute time intervals between the individual events in order to be able to process these further. Furthermore, data processing units are used increasingly today that comprise a plurality of processors for processing different tasks. In this case, a common time base for the different CPUs may be necessary.
Thus, a plurality of processors on a plurality of boards is frequently used in test systems for control electronics. Processors require a common time base for synchronizing software. This is provided on the boards typically not by the processors themselves but by external components such as, for example, FPGAs. If a software requires a timestamp, the corresponding processor asks for the current time from the FPGA. This query requires a certain amount of time. The timestamps are necessary, e.g., for presenting individual values in a plotter or for the time-based presentation of real-time tasks in a profiler.
Accordingly, a timestamp in the case of a DS1006 processor board from the company dSPACE is obtained through accesses to the register of the dSPACE FPGA. Timestamps are taken relatively frequently in the simulation and execution of real-time models. Accesses to the FPGA are relatively costly, however, in comparison with accesses to local CPU variables, as a result of which the calculation of timestamps is time-consuming and the turnaround times for individual tasks increase.
Many processors have an internal clock. Querying this clock to ask for the current time requires much less time than querying the external component, i.e., the FPGA. However, the internal clock has a low accuracy and can depend on the processor clock, for which reason the internal clock is not suitable as reference for many applications. In addition, the internal clocks of different processors are not coupled together, so that they can diverge. In real-time applications, synchronization of the processor internal clock with the global time per interrupt is not possible. To assure a deadline-conforming processing of real-time tasks, CPU interrupts cannot be used and therefore are often blocked during the processing of real-time tasks. Thus, the internal clock cannot be used for generating timestamps. An internal clock of a processor is also independent of a system time implemented in the FPGA, because it uses its own quartzes for clock generation. Accordingly, the internal clocks of different processors are not synchronous.